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Microprocessor MCQ (Multiple Choice Questions) - SchoolingAxis

Microprocessor MCQ (Multiple Choice Questions) - SchoolingAxis

Microprocessor MCQ (Multiple Choice Questions)

 1. The NMI pin should remain high for at least

a. 4 clock cycles

b. 3 clock cycles

c. 1 clock cycle

d. 2 clock cycles


Ans- d. 2 clock cycles


2. In case of string instructions, the NMI interrupt will be served only after

a. initialisation of string

b. execution of some part of the string

c. complete string is manipulated

d. the occurrence of the interrupt


Ans- c. complete string is manipulated


3. The interrupt for which the processor has highest priority among all the internal interrupts is

a. keyboard interrupt

b. TRAP

c. NMI

d. INT


Ans - b. TRAP


4. The interrupt for which the processor has the highest priority among all the external interrupts is

a. keyboard interrupt

b. TRAP

c. NMI

d. INT


Ans- c. NMI


5. The INTR interrupt may be masked using the flag

a. direction flag

b. overflow flag

c. interrupt flag

d. sign flag


Ans- c. interrupt flag


6. The Programmable interrupt controller is required to

a. handle one interrupt request

b. handle one or more interrupt requests at a time

c. handle one or more interrupt requests with a delay

d. handle no interrupt request


Ans- b. handle one or more interrupt requests at a time


7. The INTR interrupt may be

a. maskable

b. nonmaskable

c. maskable and nonmaskable

d. none of the mentioned


Ans- a. maskable


8. If any interrupt request given to an input pin cannot be disabled by any means then the input pin is called

a. maskable interrupt

b. nonmaskable interrupt

c. maskable interrupt and nonmaskable interrupt

d. none of the mentioned


Ans- b. nonmaskable interrupt


9. NMI stands for

a. nonmaskable interrupt

b. nonmultiple interrupt

c. nonmovable interrupt

d. none of the mentioned


Ans- a. nonmaskable interrupt


10. Whenever a number of devices interrupt a CPU at a time, and if the processor is able to handle them properly, it is said to have

a. interrupt handling ability

b. interrupt processing ability

c. multiple interrupt processing ability

d. multiple interrupt executing ability


Ans- c. multiple interrupt processing ability