Boolean Algebra and Logic Circuits - Multiple Choice Questions

1. The number of values applicable in Boolean Algebra.

A. 1.

B. 2.

C. 3.

D. 4.

2. The symbol + in Boolean is also known as the ____________ operator.

A. AND.

B. OR.

D. SUMMATION.

3.  Which operator has the highest precedence.

A. +.

B. ..

C. !.

D. *.

4. In the expression Y + X’.Y, which operator will be evaluated first.

A. ‘.

B. +.

C. ..

D. ,.

5. Which of the following is false.

A. x+y=y+x

B. xy=yx

C. xx’=1.

D. x+x’=1.

6. As per idempotent law, X + X will always be equal to ________.

A. 0.

B. 1.

C. X.

D. 2X.

7. The expression for involution law is  _________.

A. x+y=y+x

B. x+1=1.

C. (x’)’=x

D. xx=x

8. Who proposed the use of Boolean algebra in the design of relay switching circuits.

A. George Boole

B. Claude E. Shannon

C. Claude E. Boole

D. George Shannon

9. Truth table is used to represent Boolean   __________.

A. functions

B. algebra

C. operators

10. The terms in SOP are called  ___________.

A. max terms

B. min terms

C. mid terms

D. sum terms

11. A sum of products expression is a product term (min term) or several min terms ANDed together.

A. True

B. False

C. Nothing Can be said

D. None of the mentioned

12. Which of the following is an incorrect SOP expression.

A. x+xy

B. (x+y)(x+z).

C. x

D. x+y

13.  The corresponding min term when x=0, y=0 and z=1..

A. xyz’.

B. X’+Y’+Z.

C. X+Y+Z’.

D. x’.y’.z

14. LSI stands for  ___________.

A. Large Scale Integration

B. Large System Integration

C. Large Symbolic Instruction

D. Large Symbolic Integration

15. Which operation is shown in the following expression: (X+Y’).(X+Z).(Z’+Y’).

A. NOR.

B. ExOR.

C. SOP.

D. POs

16. The number of min terms for an expression comprising of 3 variables.

A. 8.

B. 3.

C. 0.

D. 1.

17. The number of cells in a K-map with n-variables

A. 2n

B. n2.

C. 2n

D. n

18. The output of AND gates in the SOP expression is connected using the ________ gate.

A. XOR.

B. NOR.

C. AND.

D. OR.

19. The expression A+BC is the  reduced form of ______________.

A. AB+BC.

B. (A+B)(A+C).

C. (A+C)B.

D. (A+B)C.

20. A ____________ is a circuit with only one output but can have multiple inputs

A. Logic gate

B. Truth table

C. Binary circuit

D. Boolean circuit

21. There are 5 universal gates

A. True

B. False

C. Nothing Can be said

D. None of the mentioned

22. The Output is LOW if any one of the inputs is HIGH in case of a _________ gate.

A. NOR.

B. NAND.

C. OR.

D. AND.

23. The complement of the input given is obtained in case of:.

A. NOR.

B. AND+NOR.

C. NOT.

D. EX-OR.

24. How many AND gates are required to realize the following expression Y=AB+BC.

A. 4.

B. 8.

C. 1.

D. 2.

25. Number of outputs in a half adder _____________.

A. 1.

B. 2.

C. 3.

D. 0.

26. The ________ gate is an OR gate followed by a NOT gate.

A. NAND.

B. EXOR.

C. NOR.

D. EXNOR.

27. The expression of a NAND gate is_______.

A. A.B.

B. A’B+AB’.

C. (A.B)’.

D. (A+B)’.

28. Which of the following correctly describes the distributive lawa)( A+B)(C+D)=AB+CD.

A. (A+B).C=AC+BC.

B. (AB)(A+B)=AB.

C. (A.B)C=AC.AB.

D. None of the mentioned

29. Boolean Function is of the form of ________.

A. Truth values

B. K=f(X,Y,X).

C. Algebraic Expression

D. Truth Table

30. The result of X+X.Y is X..

A. True

B. False

C. Nothing Can be said

D. None of the mentioned

31. In the boolean function w=f(X,Y,Z), what is the RHS referred to as ________.

A. right hand side

B. expression

C. literals

D. boolean

32.  The general form for calculating the number of rows in a truth table is ________.

A. 2n

B. 2n+1.

C. 2n

D. 2n+1.

33. The number of literals in the expression F=X.Y’ +  Z are _____________.

A. 4.

B. 3.

C. 2.

D. 1.

34. The complement term for X’.Y’.Z + X.Y will be _____________.

A. XYZ’+X’Y’.

B. (X+Y+Z’)(X’+Y’).

C. (X+Y+Z’)(X’+Y).

D. (X+Y+Z’)(X’+Y).

35. What is the complement of X’Y’Z.

A. X+YZ.

B. X’+Y+’Z’.

C. X+Y+Z’.

D. XYZ’.

36. The minterm of any expression is denoted by  ___________.

A. Mt

B. m

C. M.

D. min

37. The min term when X=Y=Z=0 is  _____________.

A. x’+y’+z’.

B. xyz

C. x’y’z’.

D. x+y+z

38. The max term when X=Y=Z=1 is ________.

A. x’+y’+z’.

B. xyz

C. x’y’z’.

D. x+y+z

39. Electronic circuits that operate on one or more input signals to produce standard output  _______.

A. Series circuits

B. Parallel Circuits

C. Logic Signals

D. Logic Gates

40. Logic Gates are the building blocks of all circuits in a computer.

A. True

B. False

C. Nothing Can be said

D. None of the mentioned

41. A   __________ gate gives the output as 1 only if all the inputs signals are 1..

A. AND.

B. OR.

C. EXOR.

D. NOR.

42.  The boolean expression of an OR gate is _______.

A. A.B.

B. A’B+AB’.

C. A+B.

D. A’B’.

43. The gate which is used to reverse the output obtained is _____.

A. NOR.

B. NAND.

C. EXOR.

D. NOT.

44. Which of the following gate will give a 0 when both of its inputs are 1.

A. AND.

B. OR.

C. NAND.

D. EXOR.

45. When logic gates are connected to form a gating/logic network it is called as a ______________ logic circuit.

A. combinational

B. sequential

C. systematic

D. hardwired

46. The universal gate that can be used to implement any Boolean expression is __________.

A. NAND.

B. EXOR.

C. OR.

D. AND.

47. The gate which is called an inverter is called _________.

A. NOR.

B. NAND.

C. EXOR.

D. NOT.