# Interfacing to the Analog world in Digital Logic Design MCQs

Q1. How many different voltages can be output from a DAC with a 6-bit resolution?.

A. 6.

B. 16.

C. 32.

D. 64.

Q2. The main advantage of the successive-approximation A/D converter over the counter-ramp A/D converter is its:.

A. more complex circuitry.

B. less complex circuitry.

C. longer conversion time.

D. shorter conversion time.

Q3. The quantization error in an analog-to-digital converter can be reduced by:.

A. increasing the number of bits in the counter and DAC..

B. decreasing the number of bits in the counter and increasing the number of bits in the DAC..

C. increasing the number of bits in the counter and decreasing the number of bits in the DAC..

D. decreasing the number of bits in the counter and DAC..

Answer= increasing the number of bits in the counter and DAC.

Q4. One disadvantage of the tracking A/D converter is:.

A. that it requires two counters - one for up and one for down..

B. that the binary output will oscillate between two binary states when the analog input is constant..

C. the need for an accurate clock reference for the counter..

D. the need for a latch and its associated control circuit..

Answer= that the binary output will oscillate between two binary states when the analog input is constant.

Q5. If the range of output voltage of a 6-bit DAC is 0 to 15 volts, what is the step voltage of the output?.

A. 0.117 volt/step.

B. 0.234 volt/step.

C. 2.13 volts/step.

D. 4.26 volts/step.

Q6. The process by which a computer acquires digitized analog data is referred to as ________..

A. data acquisition.

B. monotonicity.

C. analog resolution.

D. systematic digital conversion.

Q7. Describe offset error for a DAC..

A. missing codes.

B. error in the slope of the output staircase waveform.

C. more or less input voltage is required for the first step than what is specified.

D. None of the mentioned.

Answer= more or less input voltage is required for the first step than what is specified

A. high speed and low cost..

B. high sensitivity to noise and low cost..

C. low sensitivity to noise and high speed..

D. low sensitivity to noise and low cost..

Answer= low sensitivity to noise and low cost.

Q9. ________ are the most linear of all the temperature transducers..

A. Thermistors.

B. Thermocouples.

C. IC temperature sensors.

D. Resistance temperature detectors.

Q10. Which of the following characterizes an analog quantity?.

A. Discrete levels represent changes in a quantity..

B. Its values follow a logarithmic response curve..

C. It can be described with a finite number of steps..

D. It has a continuous set of values over a given range..

Answer= It has a continuous set of values over a given range.

Q11. What is the resolution of a D/A converter?.

A. the comparison between the actual output of the converter and its expected output.

B. the reciprocal of the number of discrete steps in the D/A output.

C. the deviation between the ideal straight-line output and the actual output of the converter.

D. the ability to resolve between forward and reverse steps when seQnced over its entire range.

Answer= the reciprocal of the number of discrete steps in the D/A output

Q12. What is the major advantage of the R/2R ladder DAC as compared to a binary-weighted-input DAC?.

A. It has fewer parts for the same number of inputs..

B. It is much easier to analyze its operation..

C. It uses only two different resistor values..

D. The virtual ground is eliminated and the circuit is therefore easier to understand and troubleshoot..

Answer= It uses only two different resistor values.

Q13. An analog-to-digital converter has a four-bit output. How many analog values can it represent?.

A. 4.

B. 2-Jan.

C. 16.

D. 0.0625.

Q14. When comparing the conversions from digital-to-analog and analog-to-digital, the A/D conversion is generally:.

A. less complicated but more time consuming than the D/A conversion..

B. more complicated and more time consuming than the D/A conversion..

C. less complicated and less time consuming than the D/A conversion..

D. None of the mentioned.

Answer= less complicated but more time consuming than the D/A conversion.

Q15. The output of a basic 4-bit input digital-to-analog converter would be capable of outputting:.

A. 16 different values of voltage or current that are not proportional to the input binary number.

B. 16 different values of voltage or current that are proportional to the input binary number.

C. 32 different values of voltage or current that are not proportional to the input binary number.

D. 32 different values of voltage or current that are proportional to the input binary number.

Answer= 16 different values of voltage or current that are proportional to the input binary number

Q16. Which of the following characterizes an analog quantity?.

A. Discrete levels represent changes in a quantity..

B. Its values follow a logarithmic curve..

C. It can be described with a finite number of steps..

D. It has a continuous set of values over a given range..

Answer= It has a continuous set of values over a given range.

Q17. A 4-bit stairstep-ramp A/D converter has a clock freQncy of 100 kHz and maximum input voltage of 10 V..

A. The maximum number of samples per second will be 6250..

B. The maximum sample rate will be 100,000 samples/second..

C. The minimum sample rate will be 6250 samples/second..

D. The minimum sample rate will be 100,000 samples/second..

Answer= The minimum sample rate will be 6250 samples/second.

Q18. What is the accuracy of a D/A converter?.

A. It is the reciprocal of the number of discrete steps in the D/A output..

B. It is the comparison between the actual output of the converter and its expected output..

C. It is the converter's ability to resolve between forward and reverse steps when seQnced over its entire range of inputs..

D. It is the deviation between the ideal straight-line output and the actual output of the converter..

Answer= It is the comparison between the actual output of the converter and its expected output.

Q19. An analog quantity varies from 0 - 7 V and is input to a 6-bit A/D converter. What analog value is represented by each step on the digital output?.

A. 0.111 V.

B. 1.17 V.

C. 0.109 V.

D. 0.857 V.

Q20. Inaccurate A/D conversion may be due to:.

B. linear ramp usage.

C. intermittent counter inputs.

D. faulty sample-and-hold circuitry.

Q21. What is the resolution, in percent, of a 12-bit DAC?.

A. 8.33.

B. 0.049.

C. 0.000488.

D. 0.083.

Q22. What circuitry is on an ADC0808 IC?.

A. A multiplexer.

C. A 3-bit select input code.

D. All of the above.

Q23. What is the maximum conversion time for an 8-bit successive-approximation ADC with a clock freQncy of 20 kHz?.

A. 12.8 ms.

B. 6.4 ms.

C. 0.05 ms.

D. 0.4 ms.

A. less expensive.

B. very fast conversion.

C. less complicated circuit.

D. None of the mentioned.

Q25. If the same analog signal is to be converted to an 8-bit resolution using a counter-ramp ADC, how many comparator circuits would be used?.

A. 1.

B. 8.

C. 127.

D. 255.

Q26. What is the major advantage of the R/2R ladder D/A converter as compared to a binary-weighted D/A converter?.

A. It has fewer parts for the same number of inputs..

B. It is much easier to analyze its operation..

C. It uses only two different resistor values..

D. The virtual ground is eliminated and the circuit is therefore easier to understand and troubleshoot..

Answer= It uses only two different resistor values.

Q27. What is the main disadvantage of the stairstep-ramp A/D converter?.

A. The counter must count up from zero at the beginning of each conversion seQnce, and the conversion time will vary depending on the input voltage..

B. It requires a counter..

C. It requires a precision clock in order for the conversion to be reliable..

D. All of the above.

Answer= The counter must count up from zero at the beginning of each conversion seQnce, and the conversion time will vary depending on the input voltage.

Q28. What is the purpose of a sample-and-hold circuit?.

A. To keep temporary memory.

B. To hold a voltage constant so an ADC has time to produce an output.

C. To hold a voltage constant so a DAC has time to produce an output.

D. To hold data after a multiplexer has selected an output.

Answer= To hold a voltage constant so an ADC has time to produce an output

Q29. What is the linearity of a D/A converter?.

A. It is the reciprocal of the number of discrete steps in the D/A output..

B. It is the comparison between the actual output of the converter and its expected output..

C. It is the converter's ability to resolve between forward and reverse steps when seQnced over its entire range of inputs..

D. It is the deviation between the ideal straight-line output and the actual output of the converter..

Answer= It is the deviation between the ideal straight-line output and the actual output of the converter.

A. complex circuit.

B. high cost.

C. very slow.

D. None of the mentioned.

Q31. What is the maximum conversion time for a counter-ramp ADC with 8-bit resolution and a clock freQncy of 20 kHz?.

A. 12.8 ms.

B. 6.4 ms.

C. 0.05 ms.

D. 0.4 ms.

Q32. A certain digital-to-analog converter has a step size of 0.25 V and a full-scale output of 7.75 V. Determine the percent of resolution and the number of input binary bits..

A. 31%, 4 bits.

B. 3.23%, 4 bits.

C. 31%, 5 bits.

D. 3.23%, 5 bits.

Q33. A simultaneous A/D converter is also known as a(n) ________ A/D converter..

A. flash.

B. synchronous.

C. comparator.

D. asynchronous.

Q34. The primary disadvantage of the simultaneous A/D converter is:.

A. that it requires the input voltage to be applied to the inputs simultaneously.

B. the long conversion time required.

C. the large number of output lines required to simultaneously decode the input voltage.

D. the large number of comparators required to represent a reasonable sized binary number.

Answer= the large number of comparators required to represent a reasonable sized binary number

Q35. Three characteristics of op amps make them almost ideal amplifiers: very high input impedance, very low impedance, and ________..

A. very high voltage gain.

B. unlimited bandwidth.

C. a low slew rate.

D. very high current gain.

Q36. Sample-and-hold circuits in A/D converters are designed to:.

A. sample and hold the output of the binary counter during the conversion process.

B. stabilize the comparator's threshold voltage during the conversion process.

C. stabilize the input analog signal during the conversion process.

D. sample and hold the D/A converter staircase waveform during the conversion process.

Answer= stabilize the input analog signal during the conversion process

Q37. Why is a binary-weighted DAC usually limited to 4-bit binary conversion?.

A. too many pins on the IC.

B. too many op amps needed.

C. too many different values of capacitors.

D. too many different values of resistors.

Answer= too many different values of resistors

Q38. What is the resolution of a D/A converter?.

A. It is the reciprocal of the number of discrete steps in the D/A output..

B. It is the comparison between the actual output of the converter and its expected output..

C. It is the deviation between the ideal straight-line output and the actual output of the converter..

D. It is the converter's ability to resolve between forward and reverse steps when seQnced over its entire range of inputs..

Answer= It is the reciprocal of the number of discrete steps in the D/A output.

Q39. What is gain error in a DAC?.

A. missing codes.

B. error in the slope of the output staircase waveform.

C. more or less input voltage is required for the first step than what is specified.

D. None of the mentioned.

Answer= error in the slope of the output staircase waveform

Q40. An actuator is usually a device that:.

A. converts analog data to meaningful digital data..

B. controls a physical variable..

C. stores digital data and then processes that data according to a set of specified instructions..

D. converts a physical variable to an electrical variable..

Q41. Which of the following logic families has the shortest propagation delay?.

A. CMOS.

B. BiCMOS.

C. ECL.

D. 74SXX.