Logic Gates in Digital Logic Design MCQs

Q1. The output of an AND gate with three inputs, A, B, and C, is HIGH when ________..

A. A = 1, B = 1, C = 0.

B. A = 0, B = 0, C = 0.

C. A = 1, B = 1, C = 1.

D. A = 1, B = 0, C = 1.

Answer= A = 1, B = 1, C = 1

Q2. If a 3-input NOR gate has eight input possibilities, how many of those possibilities will result in a HIGH output?.

A. 1.

B. 2.

C. 7.

D. 8.

Q3. If a signal passing through a gate is inhibited by sending a LOW into one of the inputs, and the output is HIGH, the gate is a(n):.

A. AND.

B. NAND.

C. NOR.

D. OR.

Q4. A device used to display one or more digital signals so that they can be compared to expected timing diagrams for the signals is a:.

A. DMM.

B. Spectrum analyzer.

C. Logic analyzer.

D. FreQncy counter.

Q5. When used with an IC, what does the term "QUAD" indicate?.

A. 2 circuits.

B. 4 circuits.

C. 6 circuits.

D. 8 circuits.

Q6. The output of an OR gate with three inputs, A, B, and C, is LOW when ________..

A. A = 0, B = 0, C = 0.

B. A = 0, B = 0, C = 1.

C. A = 0, B = 1, C = 1.

D. All of the above.

Answer= A = 0, B = 0, C = 0

Q7. Which of the following logical operations is represented by the + sign in Boolean algebra?.

A. Inversion.

B. AND.

C. OR.

D. Complementation.

Q8. Output will be a LOW for any case when one or more inputs are zero for a(n):.

A. OR gate.

B. NOT gate.

C. AND gate.

D. NOR gate.

Q9. How many pins does the 4049 IC have?.

A. 14.

B. 16.

C. 18.

D. 20.

Q10. Which of the following choices meets the minimum requirement needed to create specialized waveforms that are used in digital control and seQncing circuits?.

A. Basic gates, a clock oscillator, and a repetitive waveform generator.

B. Basic gates, a clock oscillator, and a Johnson shift counter.

C. Basic gates, a clock oscillator, and a DeMorgan pulse generator.

D. Basic gates, a clock oscillator, a repetitive waveform generator, and a Johnson shift counter.

Answer= Basic gates, a clock oscillator, and a repetitive waveform generator

Q11. TTL operates from a ________..

A. 9-volt supply.

B. 3-volt supply.

C. 12-volt supply.

D. 5-volt supply.

Q12. The output of a NOR gate is HIGH if ________..

A. All inputs are HIGH.

B. Any input is HIGH.

C. Any input is LOW.

D. All inputs are LOW.

Q13. The switching speed of CMOS is now ________..

A. Competitive with TTL.

B. Three times that of TTL.

C. Slower than TTL.

D. Twice that of TTL.

Q14. The format used to present the logic output for the various combinations of logic inputs to a gate is called a(n):.

A. Boolean constant.

B. Boolean variable.

C. Truth table.

D. Input logic function.

Q15. The power dissipation, PD, of a logic gate is the product of the ________..

A. dc supply voltage and the peak current.

B. dc supply voltage and the average supply current.

C. ac supply voltage and the peak current.

D. ac supply voltage and the average supply current.

Answer= dc supply voltage and the average supply current

Q16. If a 3-input AND gate has eight input possibilities, how many of those possibilities will result in a HIGH output?.

A. 1.

B. 2.

C. 7.

D. 8.

Q17. The Boolean expression for a 3-input AND gate is ________..

A. X = AB.

B. X = ABC.

C. X = A + B + C.

D. X = AB + C.

Q18. What does the small bubble on the output of the NAND gate logic symbol mean?.

A. Open collector output.

B. Tristate.

C. The output is inverted..

D. None of the above.

Q19. The output of a NOT gate is HIGH when ________..

A. The input is LOW.

B. The input is HIGH.

C. Power is applied to the gate's IC.

D. Power is removed from the gate's IC.

Q20. If the input to a NOT gate is A and the output is X, then ________..

A. X = A.

B. X = B'.

C. X = 0.

D. None of the above.

Q21. How many inputs of a four-input AND gate must be HIGH in order for the output of the logic gate to go HIGH?.

A. Any one of the inputs.

B. Any two of the inputs.

C. Any three of the inputs.

D. All four inputs.

Q22. If the output of a three-input AND gate must be a logic LOW, what must the condition of the inputs be?.

A. All inputs must be LOW..

B. All inputs must be HIGH..

C. At least one input must be LOW..

D. None of the mentioned.

Answer= At least one input must be HIGH.

Q23. Logically, the output of a NOR gate would have the same Boolean expression as a(n):.

A. NAND gate immediately followed by an inverter.

B. OR gate immediately followed by an inverter.

C. AND gate immediately followed by an inverter.

D. NOR gate immediately followed by an inverter.

Answer= OR gate immediately followed by an inverter

Q24. What is the Boolean expression for a three-input AND gate?.

A. X = A + B + C.

B. X = A  . B . C.

C. A - B - C.

D. A \$ B \$ C.

Answer= X = A  . B . C

Q25. Which of the following gates has the exact inverse output of the OR gate for all possible input combinations?.

A. NOR.

B. NOT.

C. NAND.

D. AND.

Q26. The output of an exclusive-OR gate is HIGH if ________..

A. All inputs are LOW.

B. All inputs are HIGH.

C. The inputs are unequal.

D. None of the above.

Q27. The AND function can be used to ________ and the OR function can be used to ________ ..

A. Enable, disable.

B. Disable, enable.

C. Enable or disable, enable or disable.

D. Detect, invert.

Answer= Enable or disable, enable or disable

Q28. One advantage TTL has over CMOS is that TTL is ________..

A. Less expensive.

B. Not sensitive to electrostatic discharge.

C. Faster.

D. More widely available.

Answer= Not sensitive to electrostatic discharge

Q29. A 2-input NOR gate is equivalent to a ________..

A. Negative-OR gate.

B. Negative-AND gate.

C. Negative-NAND gate.

D. None of the above.

Q30. If a 3-input OR gate has eight input possibilities, how many of those possibilities will result in a HIGH output?.

A. 1.

B. 2.

C. 7.

D. 8.

Q31. Fan-out is specified in terms of ________..

A. Voltage.

B. Current.

C. Wattage.

Q32. How many input combinations would a truth table have for a six-input AND gate?.

A. 32.

B. 48.

C. 64.

D. 128.

Q33. The terms "low speed" and "high speed," applied to logic circuits, refer to the ________..

A. Rise time.

B. Fall time.

C. Propagation delay time.

D. Clock speed.

Q34. The NOR logic gate is the same as the operation of the ________ gate with an inverter connected to the output..

A. OR.

B. AND.

C. NAND.

D. None of the above.

Q35. The logic expression for a NOR gate is ________..

A. X = A' + B.

B. X = A + B'.

C. X = A + B.

D. X = (A + B)'.

Answer= X = (A + B)'

Q36. With regard to an AND gate, which statement is true?.

A. An AND gate has two inputs and one output..

B. An AND gate has two or more inputs and two outputs..

C. If one input to a 2-input AND gate is HIGH, the output reflects the other input..

D. A 2-input AND gate has eight input possibilities..

Answer= If one input to a 2-input AND gate is HIGH, the output reflects the other input.

Q37. The term "hex inverter" refers to:.

A. An inverter that has six inputs.

B. Six inverters in a single package.

C. A six-input symbolic logic device.

D. An inverter that has a history of failure.

Answer= Six inverters in a single package

Q38. The basic logic gate whose output is the complement of the input is the:.

A. OR gate.

B. AND gate.

C. Inverter.

D. Comparator.

Q39. When reading a Boolean expression, what does the word "NOT" indicate?.

A. The same as.

B. Inversion.

C. High.

D. Low.

Q40. The output of an exclusive-NOR gate is HIGH if ________..

A. The inputs are equal.

B. One input is HIGH, and the other input is LOW.

C. The inputs are unequal.

D. None of the above.

Q41. Which of the following equations would accurately describe a four-input OR gate when A = 1, B = 1, C = 0, and D = 0?.

A. 1 + 1 + 0 + 0 = 01.

B. 1 + 1 + 0 + 0 = 1.

C. 1 + 1 + 0 + 0 = 0.

D. 1 + 1 + 0 + 0 = 00.

Answer= 1 + 1 + 0 + 0 = 1

Q42. What is the name of a digital circuit that produces several repetitive digital waveforms?.

A. An inverter.

B. An OR gate.

C. A Johnson shift counter.

D. An AND gate.

Q43. The basic types of programmable arrays are made up of ________..

A. AND gates.

B. OR gates.

C. NAND and NOR gates.

D. AND gates and OR gates.

Answer= AND gates and OR gates

Q44. The logic gate that will have HIGH or "1" at its output when any one (or more) of its inputs is HIGH is a(n):.

A. OR gate.

B. AND gate.

C. NOR gate.

D. NOT operation.

Q45. Which of the following is not a basic Boolean operation?.

A. OR.

B. NOT.

C. AND.

D. FOR.

Q46. Which of the following gates is described by the expression ?.

A. OR.

B. AND.

C. NOR.

D. NAND.

Q47. How many truth table entries are necessary for a four-input circuit?.

A. 4.

B. 8.

C. 12.

D. 16.

Q48. How many entries would a truth table for a four-input NAND gate have?.

A. 2.

B. 8.

C. 16.

D. 32.

Q49. From the truth table for a three-input NOR gate, what is the only condition of inputs A, B, and C that will make the output X high?.

A. A = 1, B = 1, C = 1.

B. A = 1, B = 0, C = 0.

C. A = 0, B = 0, C = 1.

D. A = 0, B = 0, C = 0.

Answer= A = 0, B = 0, C = 0

Q50. The output of a NAND gate is LOW if ________..

A. All inputs are LOW.

B. All inputs are HIGH.

C. Any input is LOW.

D. Any input is HIGH.

Ex-OR and Ex-NOR Gates MCQs

Q1. Select the statement that best describes the parity method of error detection:.

A. Parity checking is best suited for detecting double-bit errors that occur during the transmission of codes from one location to another..

B. Parity checking is not suitable for detecting single-bit errors in transmitted codes..

C. Parity checking is best suited for detecting single-bit errors in transmitted codes..

D. Parity checking is capable of detecting and correcting errors in transmitted codes..

Answer= Parity checking is best suited for detecting single-bit errors in transmitted codes.

Q2. A logic circuit that provides a HIGH output for both inputs HIGH or both inputs LOW is a(n):.

A. Ex-NOR gate.

B. OR gate.

C. Ex-OR gate.

D. NAND gate.

Q3. A logic circuit that provides a HIGH output if one input or the other input, but not both, is HIGH, is a(n):.

A. Ex-NOR gate.

B. OR gate.

C. Ex-OR gate.

D. NAND gate.

Q4. How is odd parity generated differently from even parity?.

A. The first output is inverted..

B. The last output is inverted..

C. Both (A) and (B).

D. None of the above.

Answer= The last output is inverted.

Q5. Parity systems are defined as either________ or ________ and will add an extra ________ to the digital information being transmitted..

A. positive, negative, byte.

B. odd, even, bit.

C. upper, lower, digit.

D. on, off, decimal.

Q6. Which type of gate can be used to add two bits?.

A. Ex-OR.

B. Ex-NOR.

C. Ex-NAND.

D. NOR.

Q7. Why is an exclusive-NOR gate also called an equality gate?.

A. The output is false if the inputs are equal..

B. The output is true if the inputs are opposite..

C. The output is true if the inputs are equal..

D. None of the mentioned.

Answer= The output is true if the inputs are equal.

Q8. The Ex-NOR is sometimes called the ________..

A. parity gate.

B. equality gate.

C. inverted OR.

D. parity gate or the equality gate.